Saturday, January 14, 2012

ARM9

The ARM9 family processor is ARM's UK mainstream embedded processor design, including ARM9TDMI and ARM9E-S series. Outline Mobile phone applications, for example, 2G phones only provide voice and simple text messaging, and the current 2.5G and future 3G mobile phones in addition to providing these two functions, must also provide a variety of other applications. Include: (1) wireless network devices: mobile Internet, e-mail and other location based services and other functions; (2) PDA function: with the user operating system (Windows CE, Symbian OS, Linux, etc.) and other functions; (3) high Performance features: audio player, video phone, mobile phone games. 2.5G and 3G applications ARM9 has been fully replaced ARM7. Because new features to meet the ARM9 new needs while reducing product development time and reduce development costs. Processing capabilities A new generation of ARM9 processor, the new design, the use of more transistors can achieve more than twice the processing power on ARM7 processor. This capacity increase is reduced by increasing the clock frequency and instruction execution cycle to achieve. (A) the increase in clock frequency: ARM7 processor with 3-stage pipeline, while the ARM9 5-stage pipeline. Increase in pipeline design to improve the clock frequency and the parallel processing capabilities. 5-stage pipeline can be assigned to each processing instruction five clock cycles, a clock cycle at the same time every five instructions in execution. Under the same processing technology, ARM9TDMI ARM7TDMI processor's clock frequency is 1.8 to 2.2 times. (B) instruction cycle improvements:
 
Instruction cycle to improve processor performance improvements for the great help. Performance level of increase depends on the instruction code execution overlap, which is actually the program itself. For the most advanced language, in general, the performance increase of 30 percent. Instruction 1, loads n stores instructions and directives
 
Cycles of the most obvious improvement is loads instructions and stores instructions. Both from ARM7 to ARM9 instruction execution time is reduced by 30%. Instruction cycle is due to reduction in both processors ARM7 and ARM9 within the two basic micro-processing caused by the different structures. (1) ARM9 has separate instruction and data memory interface, which allows the processor to fetch the same time and read and write data. This is called a modified Harvard architecture. The ARM7 only data memory interface, it is also used to fetch and data access. (2) 5-stage pipeline to introduce a separate memory and write back to the line, were used to access memory and write the result back to register. More than two loads to achieve a complete cycle of instructions and stores instructions. 2, interlock (interlocks) technology When the instruction data needed because the previous instruction is not executed but is not ready will have a pipeline interlock. When the pipeline interlock occurs, the hardware will stop the execution of this command until the data is ready. Although this technology will increase the code execution time, but for the designers of the early great convenience. Compiler and assembler programmers can code in order to redesign or other methods to reduce the number of pipeline interlock. 3, branch instructions ARM9 and ARM7-branch instruction cycle is the same. And ARM9TDMI and ARM9E-S did not predict branch instruction processing.

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