Saturday, May 14, 2011

PLD(programmable logic device)

PLD(programmable logic device) as a general-purpose IC production, his logic function of device programming according to user to fix. General PLD integration high enough to satisfy the design, the needs of the digital system commonly. It can from the designer to a digital system programming and "integrated" in a PLD, without having to go to please chip manufacturer to design and manufacture special integrated circuit chips.
classification
Current use of PLD products mainly are: 1, field programmable logical array FPLA (programmable array); field questions 2, programmable array programmable logic PAL (array questions); 3, general array GAL (generic array logical questions); 4, can erase programmable logic devices erasable programmable EPLD (device); questions 5 and the field reprogrammable array FPGA (field programmable gate array). Including EPLD and FPGA integration is quite high. Sometimes make both devices called high-density PLD.
development
Early programmable logic device only programmable read-only CunZhuQi (PROM), ultraviolet ray can press except read-only CunZhuQi (an EPROM) and electricity can erase read-only CunZhuQi (EEPROM) 3 kinds. Due to the structure limits, they can only complete simple digital logic function. Thereafter, the emergence of a kind of structure of complex programmable chips slightly, can programming logical device, it can finish all kinds of digital logic function. The typical PLD by an "and" door and a "or" gate arrays, and any one of combinational logic can use "and a or" expressions to describe, therefore, with product and PLD can do a great deal of the form of combinational logic function. This one phase of products mainly include GAL PAL and. PAL consists of a programmable "and" plane and a fixed "or" planar door, or the output can be a choice by flip-flop for hosting for state. PAL device is field programmable, its realization process has anti weld wire technology, an EPROM technology and EEPROM technology. And those structure is more flexible logic device is programmable logical array (PLA), it also consists of a "and" plane and a "or" plane constitution, but the two plane connection relationship is programmable. PLA device both field programmable, also have mask programmable. On the basis of PAL, and developed a common GAL, such as GAL16V8 array of logic, GAL22V10 etc. It adopted EEPROM craft, realize the electricity can press except, electricity can be rewritten, its output structure is programmable logic macro unit so that its design has a strong flexibility, so far, there are still many people use. These early PLD device of a common is can realize speed characteristics better logic functions, but its too simple structure also make they can only achieve scale smaller circuits. In order to make up for the defect in the mid 1980s, Altera and Xilinx separately launched similar to PAL structure of expandable CPLD and standard gate array (FPGA, they are similar with system structure and logic unit flexible, and integration is high and wide application scope, etc. The two devices compatible PLD and general gate arrays, which can realize the advantages of a large-scale circuit, programming is also very flexible. And the gate arrays, compared to other ASIC design they have short development cycle, design and manufacture of low cost, development tools advanced, standard products without testing, stable quality and can real-time online inspection wait for an advantage, so widely applied to product prototype design and product production (generally in 10,000 pieces of below). Almost all application gate arrays, and small and medium-sized general PLD and digital integrated circuit can be applied to the occasion are FPGA and CPLD device.
composition
· a two-dimensional array, constitute the logical block PLD devices composed core logic.
· input/output block: connect logic pieces of interconnect resources.
· attachment resources: by all sorts of length counting the attachment, which also have some of programmable connection switch, they are used in logic brick, between logic brick and input/output block of connections between.

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